Class-ab Rail-to-rail Cmos Buffer Amplifier for Tft-lcd Source Drivers

A class-AB rail-to-rail CMOS buffer amplifier is proposed and fabricated. The main circuit structure includes a bias circuit, a complementary folded-cascode differential input stage, a common-mode rejection ratio (CMRR) enhancement stage, and a class-AB output stage. With the complementary folded-cascode input stage, high input common-mode range (ICMR) and rail-to-rail output are realized. By utilizing the CMRR enhancement stage, the open loop gain and CMRR have been enlarged, hence errors of the amplifier have been greatly diminished and the offset voltages are decreased by the high gains of the input stage and the CMRR enhancement stage. The circuit is demonstrated by using a 0.35-μm CMOS technology. The output load of the buffer is a 5-stage R-C network (R = 2 kΩ, C = 30 pF). The average offset voltage is about 0.57 mV in mid-gray levels and the output swing reaches from 0.011 to 3.296 V with a 3.3 V supply voltage. The settling times are 1.84 and 1.34 μs for the rising and falling edges, respectively, and the quiescent current is only 3.1 μA. The proposed buffer amplifier has potential to be applied for source drivers of large-size, high-resolution, and high-color-depth TFT-LCDs.